[docs]classAddMnemonic(_ABCBasicMnemonic):""" The ADD instruction in assembler performs the addition of two operands. A mandatory rule is that the operands are equal in size; only two 16-bit numbers or two 8-bit numbers can be added to each other. """
[docs]def__init__(self,*operands:tuple[Union["Register",str,int]],enable_comment:bool=True):"""Initialize a mnemonic."""super().__init__("add",*operands,enable_comment=enable_comment)
[docs]def_validate(self)->None:"""Validate the mnemonic."""iflen(self.operands)!=2:raiseValueError(f"Mnemonic ADD required 2 operands; but get {len(self.operands)}")
[docs]def_generate_default_comment(self)->str:returnf"Adding the {self.operands[1]!s} value to the {self.operands[0]!s}"
[docs]classSubMnemonic(_ABCBasicMnemonic):""" The ASM sub mnemonic is a subtraction instruction. It subtracts the source operand from the destination operand and replaces the destination with the result. """
[docs]def__init__(self,*operands:tuple[Union["Register",str,int]],enable_comment:bool=True):"""Initialize a mnemonic."""super().__init__("sub",*operands,enable_comment=enable_comment)
[docs]def_validate(self)->None:"""Validate the mnemonic."""iflen(self.operands)!=2:raiseValueError(f"Mnemonic SUB required 2 operands;but get {len(self.operands)}")
[docs]def_generate_default_comment(self)->str:returnf"Subtract the {self.operands[1]!s} value from the {self.operands[0]!s}"
[docs]classDivMnemonic(_ABCBasicMnemonic):""" The ASM DIV mnemonic is a division instruction. It divise the source operand from the destination operand and replaces the destination with the result. """
[docs]def__init__(self,*operands:tuple[Union["Register",str,int]],enable_comment:bool=True):"""Initialize a mnemonic."""super().__init__("div",*operands,enable_comment=enable_comment)
[docs]def_validate(self)->None:"""Validate the mnemonic."""iflen(self.operands)!=2:raiseValueError(f"Mnemonic DIV required 2 operands;but get {len(self.operands)}")
[docs]def_generate_default_comment(self)->str:returnf"Dividing the {self.operands[1]!s} value to the {self.operands[0]!s}"
[docs]classMulMnemonic(_ABCBasicMnemonic):""" The ASM MUL mnemonic is a multiplication instruction. It multiplicates the source operand from the destination operand and replaces the destination with the result. """
[docs]def__init__(self,*operands:tuple[Union["Register",str,int]],enable_comment:bool=True):"""Initialize a mnemonic."""super().__init__("mul",*operands,enable_comment=enable_comment)
[docs]def_validate(self)->None:"""Validate the mnemonic."""iflen(self.operands)!=2:raiseValueError(f"Mnemonic MUL required 2 operands;but get {len(self.operands)}")
[docs]def_generate_default_comment(self)->str:return(f"Multiplicating the {self.operands[1]!s} value to the {self.operands[0]!s}")
[docs]classIncMnemonic(_ABCBasicMnemonic):"""The ASM INC mnemonic is a increment instruction. It increments the register."""
[docs]def__init__(self,*operands:tuple[Union["Register",str,int]],enable_comment:bool=True):"""Initialize a mnemonic."""super().__init__("inc",*operands,enable_comment=enable_comment)
[docs]def_validate(self)->None:"""Validate the mnemonic."""iflen(self.operands)!=1:raiseValueError(f"Mnemonic INC required 1 operands;but get {len(self.operands)}")
[docs]classDecMnemonic(_ABCBasicMnemonic):"""The ASM DEC mnemonic is a decrement instruction. It decrements the register."""
[docs]def__init__(self,*operands:tuple[Union["Register",str,int]],enable_comment:bool=True):"""Initialize a mnemonic."""super().__init__("dec",*operands,enable_comment=enable_comment)
[docs]def_validate(self)->None:"""Validate the mnemonic."""iflen(self.operands)!=1:raiseValueError(f"Mnemonic DEC required 1 operands;but get {len(self.operands)}")